找到你要的答案

Q:Easy way to assign values to an array in Verilog?

Q:赋值在描述数组容易的方法吗?

So I'm creating a large FIR filter in Verilog, it has 256 taps. So I need 256 coefficients. I want to try and make my code as modular as possible so I wonder if there's a way to create another external file to the FIR module which contains the values for the coefficients? Currently the only I know to assign values to an array in Verilog is like the following:

reg [15:0] datafile [8];

initial
begin
    datafile[0] = 32768;
    datafile[1] = 37045;
    datafile[2] = 41248;
    datafile[3] = 45307;
    datafile[4] = 49151;
    datafile[5] = 52715;
    datafile[6] = 55938;
    datafile[7] = 58764;
end

But when you have 256 values to assign this is a very long process manually organising the code, even with Find/Replace you can only do so much. What I want is the ability to assign values to arrays like you can in System Verilog:

reg [15:0] datafile [8] = '{8468,56472,56874,358,2564,8498,4513,9821};

I don't want to use System Verilog as it isn't as widely used. Can anyone help?

所以我创建一个Verilog大FIR滤波器,它有256个水龙头。所以我需要256个系数。我想尽量使我的代码尽可能的模块化,所以我想知道是否有一种方法来创建另一个外部文件的FIR模块,其中包含系数的值?目前我只知道赋值在Verilog数组如下:

reg [15:0] datafile [8];

initial
begin
    datafile[0] = 32768;
    datafile[1] = 37045;
    datafile[2] = 41248;
    datafile[3] = 45307;
    datafile[4] = 49151;
    datafile[5] = 52715;
    datafile[6] = 55938;
    datafile[7] = 58764;
end

但是,当你有256个值来分配这是一个很长的过程手动组织的代码,甚至与查找/替换你只能做这么多。我想要的是将值赋给数组一样可以在System Verilog的能力:

reg [15:0] datafile [8] = '{8468,56472,56874,358,2564,8498,4513,9821};

我不想用System Verilog作为不作为广泛使用的。有人能帮忙吗?

answer1: 回答1:

If the values (coefficients) is saved in an external file (for example 'file.txt'), you can use system functions in simulation ($fscanf) to read the values from the file and wirte them on the datafile (datafile is an array).

In the following code I assumed that you have 256 values is saved in the external file ('file.txt') and I tried to read the values 256 times from 'file.txt' and write them on the datafile :

module b(clk,reset);
    input clk;
    input reset;

    integer fileH; // file handler
    reg [15:0] datafile [0:255];
    reg [7:0] counter;

    initial begin
        fileH = $fopen ("file.txt", "r");
    end

    always @(posedge clk or posedge reset) begin
        if (reset)
            counter <= 0;
        else begin
            $fscanf (fileH, "%d\n", datafile[counter]);
            counter <= counter + 1;
        end
    end 

endmodule

As toolic said, system functions are not synthesizable. It's for simulation. If you want to write a synthesizable code, I suggest the following way :

assign {datafile[0], datafile[1], ...} = {16'b0, 16'b0, ...};

如果值(系数)是保存在一个外部文件(例如文件.txt”),你可以使用系统仿真功能($ fscanf)从文件中读取数据和写数据文件(文件上是数组)。

在下面的代码,我认为你有256的值保存在外部文件(文件.txt”),我试着读值256倍的文件.txt”和写数据文件:

module b(clk,reset);
    input clk;
    input reset;

    integer fileH; // file handler
    reg [15:0] datafile [0:255];
    reg [7:0] counter;

    initial begin
        fileH = $fopen ("file.txt", "r");
    end

    always @(posedge clk or posedge reset) begin
        if (reset)
            counter <= 0;
        else begin
            $fscanf (fileH, "%d\n", datafile[counter]);
            counter <= counter + 1;
        end
    end 

endmodule

就像toolic说的,系统的功能是不可综合的。这是为了模拟。如果你想写一个可综合的代码,我建议以下方式:

assign {datafile[0], datafile[1], ...} = {16'b0, 16'b0, ...};
arrays  verilog